Senior Physical Design Engineer / Tel-Aviv, Israel

Autonomous driving capabilities are no longer just a vision, but a reality that’s disrupting the automotive industry.
Arbe is the world’s first company to demonstrate ultra high-resolution radar with post processing and Simultaneous Localization and Mapping (SLAM). It is disrupting autonomous vehicle sensor development by bridging the gap between radar and optics with its proprietary imaging solution that provides unparalleled resolution with the reliability and maturity of radar technology for all levels of vehicle autonomy.
Join our team of technologists, radar specialists and scientists, and help us make autonomous driving a part of everyone’s daily lives. We’re looking for a talented Physical Design Engineer to join our VLSI team.

Responsibilities

  • Responsible for the Physical Design field. Including work with remote contractors
  • Responsible for full ASIC back-end flow from RTL to GDS for highly complex Mixed-signal (Digital, Analog, RF) SoCs
  • In charge of all design flow cycles including Synthesis, STA, LEC, block level PnR, floor-planning, clock and power distribution, power and noise analysis (EM / IR-Drop / Xtalk) as well as knowledge in layout verification (DRC / LVS)

Required Qualifications

  • B.Sc. in Electrical Engineering (Electronics)
  • 6+ years of experience as ASIC Back-end engineer
  • Experience in advanced CMOS process nodes (double patterning)
  • Experience in integration of Soft and hard IP’s
  • Extensive experience with one of the place & route tools available today (Synopsys / Cadence)
  • Experience with hierarchical design approach, top-down design, timing and physical convergence
  • In-depth understanding of static-timing analysis
  • Extensive know-how in clock/power distribution and analysis, RC extraction and correlation
  • Experience with SoC practices such as multiple voltage and clock domains, integration of mixed-signal IPs and I/O integration
  • Scripting and programming experience using several of the following: Perl, TCL and Make – Knowledge in Verilog – advantage
  • Experience with Unix environment and version control tools
  • Willing to work in a dynamic and demanding environment
  • Fast learner
  • A team player with the ability to work independently

Preferred Qualifications

  • Leadership capabilities
  • Experience with Analog design/Back-end for Analog design
  • Experience with RF design/back-end for RF design
  • Experience with Synopsys tools